发明名称 PICTURE COMPRESSION CIRCUIT
摘要 <p>PURPOSE:To attain the parallel processing of a color conversion processing, a DCT-SQ processing and a VLC processing and to accelerate the compression of picture data by using first-in first-out circuits. CONSTITUTION:As the result of a processing converting three colors of red, green and yellow into luminance and a color difference, initial picture data 13 is inputted to a first FIFO circuit 14 at time t1, and is immediately supplied to a DCT-SQ circuit 16. consequently, the DCT-SQ processing is executed in the circuit 16 in parallel with time when a color conversion circuit 12 executes a subsequent processing. At time t2, subsequent picture data 13 is inputted to the circuit 14 from the circuit 12 and data is buffered in the circuit 14 until the processing of the circuit 16 terminate. At time t3 when the processing terminates, data 15 is supplied from the circuit 14 to the circuit 16. At the same time, data 17 with which the processing of the circuit 16 terminates is inputted to a second FIFO circuit 18, which immediately supplies data to VLC 20 as data 19. Thus, the processing by VLC 20 starts in parallel with the processing by the circuit 16.</p>
申请公布号 JPH0376398(A) 申请公布日期 1991.04.02
申请号 JP19890210752 申请日期 1989.08.17
申请人 NEC CORP 发明人 KATSUBE RYOJI
分类号 H04N11/04 主分类号 H04N11/04
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