Adder circuit e.g. for 54321 coded decimal numbers - uses dual full-adder for processing five digit numbers

摘要

The electronic positional addition circuit for binary coded decimal (BCD) digits includes a dual full-adder for a processing fire-digit numbers and consisting of four AND-gates (51) each with two inputs and three OR-gates (52) each with two inputs and NOT-gates (53). The full-adder circuit functions by receiving one of the two addends coded as (51111) at the A-inputs, and the other addend similarly coded as (5111) at the B-input. The five digits places in each of the addends are processed in the full-adder in the normal way, with the adder also rOCQgginq OnQ ii l S rtil SUm Of , Whn rtr than 4. If the digit place partial sum is less than five, then the gating circuit has a high logic potential (H) and the corresp. OR-gates with the logic high potential (H) are driven by OR-gates. USE - Electronic tetrade addition circuits providing output in 51111 code and processing 54321 coded decimal numbers via additional circuits.