摘要 |
Using multiplex technology, the recognition system converts a multiplicity of input signals (TNO) into a corresponding multiplicity of debounced output signals (OUTO/7). The signal recognition system contains a first memory unit for storing an initial value of the input signals, T bistable elements (TFFO/7) for storing the corresponding output signal, and an exclusive-OR gate (EOG) for comparing the input and output signal conditions. When a difference in the exclusive-OR gate (EOG) is found, an adder unit (HA) increments the contents of a second memory unit until the value prescribed in the T bistable elements (TFFO/7) is reached. In this case, the initial value in the second memory unit corresponds to the initial value of the first memory unit. <IMAGE> |
申请人 |
ALCATEL N.V., AMSTERDAM, NL |
发明人 |
SALLAERTS, DANIEL, B-3220 AARSCHOT, BE;RAHIER, MICHEL CAMILLE AUGUSTE RENE, B-2530 BOECHOUT, BE |