| 摘要 |
<p>PURPOSE:To make compatible a readout signal current with a high threshold voltage difference by reducing the concentration of impurity just under a gate in the base plate area of the 2nd FET of a memory cell consisting of a pair of complementary FETs and increasing the concentration of impurity in the gate. CONSTITUTION:The entitled memory cell is provided with the 1st conductive type 1st FETs 3, 6, 9, 12 and the 2nd conductive type FETs 4, 8, 13 and 10 connected as shown in the drawing, a writing line 5, a reading line 7, and a word line 2. The concentration of impurity is adjusted so as to be low just under a gate 4 in the base plate area 10 of the 2nd FET and high inside the gate. For example, when Si and boron atom are used as semiconductor and the impurity in the base plate area 10 of the 2nd FET respectively, boron atom near the surface of the base plate is selectively removed by heat oxidation of the surface and the concentration profile in the depth direction of the boron atom constituting a P well is shown as the full line in the drawing.</p> |
