FRAME SYNCHRONIZATION DETECTING CIRCUIT

摘要

PURPOSE:To improve the detection accuracy of a frame synchronization pattern by comparing a prescribed threshold level with a complex correlation coefficient between a reception signal at a complex base band before demodulation and a complex signal corresponding to a prescribed frame synchronization pattern of a receiver. CONSTITUTION:The circuit consists of a maximum value detection selection circuit 1 detecting and selecting a reception signal whose envelope level is maximum, a limiter circuit 2 bringing an envelope level of the reception signal into a prescribed value, a complex number correlation circuit 3 taking the complex number correlation between the reception signal and a complex number signal 6 corresponding to the specific frame synchronization pattern, a correlation coefficient arithmetic circuit 4 obtaining the correlation coefficient and a level comparator circuit 5 comparing the correlation coefficient with a frame synchronization threshold level 7. When the complex number correlation coefficient is larger than the correlation level, the reception signal is judged to be a frame synchronization pattern. Thus, the frame synchronization pattern is accurately detected.