| 摘要 |
<p>A level shift circuit of the present invention includes an input differential pair of transistors (Q1, Q2),as an input circuit section, which are operated in accordance with the level of an input signal supplied from a preceding circuit and an output circuit section composed of first and second emitter follower transistors (Q3, Q4). A third transistor (M1) has its current path connected at one end to an emitter of the first emitter follower transistor (Q3) and makes an output level of the first emitter follower transistor (Q3) at a predetermined level. A fourth transistor (M2) has its current path connected at one end to the other end of the third transistor (M1) and is driven by an output voltage of the second emitter follower transistor (Q4) to allow an output level of the first emitter follower transistor (Q3) to be shifted to a low level. An inverter circuit is connected to the outputs of the first and second emitter follower transistors (Q3, Q4) and composed of a P- and a N-channel transistor (M3, M4) commonly connected at their adjacent paths to each other. The inverter circuit is operated in accordance with an output level of the first emitter follower transistor (Q3) to allow an output level of the second emitter follower transistor (Q4) to be output from that common connection point.</p> |
