| 摘要 |
PURPOSE:To reduce power consumption and to simplify the circuit constitution by outputting a coincidence detection signal when number of dissidence of a bit data compared by 1st and 2nd comparison means is a prescribed value or below. CONSTITUTION:When an output signal of flip-flops 37a-37f corresponding to 2nd address comparison sections 45a-45f is '0', a check bit data given via AND circuits 46a-46f and signals from a counter circuit 47 and an exclusive(EX) OR circuit are synthesized and the result is compared with a data of 20-32-th bit of an address code word stored in a shift register 42 to count bit number of dissidence. Then whether or not the sum of the bit number of dissidence obtained by 1st address comparison sections 38a-38f is 2-bit or below is discriminated and when the bit number is 2-bit or below, a coincidence detection signal is outputted to a detection address output section 49. The detection address output section 48 outputs the coincidence detection signal from the 2nd address comparison sections 45a-45f to a timing control circuit 31. Thus, useless power consumption is prevented and the circuit constitution is simplified. |
