| 摘要 |
PURPOSE:To accelerate a floating point arithmetic operation by holding the content of the floating point arithmetic operation performed in the past, and returning a held computed result to a CPU when the same operation as the arithmetic operation is performed. CONSTITUTION:When the arithmetic operation is performed with the CPU, a command, a first argument, and a second argument are transferred, and an input/output controller 114 receives an address signal 102 and a control signal 103, and writes transferred command, first argument, and second argument on a floating point computing element (EPP) 101, and simultaneously, writes them on a command register 107, a first argument register 108, and a second argument register 109. A comparator 111 compares the contents of the registers 107-109 with that of a register file 106, and when the arithmetic operation that coincides exists in the register file 106, the result of the arithmetic operation that coincides is transferred to the CPU. In such a way, the floating point arithmetic operation can be accelerated. |
