| 摘要 |
PURPOSE:To suppress the through-current at switching of high and low level of an output pulse voltage, by inputting an input signal and its delayed output to a P channel and an N channel MOSFET via an NAND circuit and an NOR circuit. CONSTITUTION:An input pulse P1 is applied to a delay circuit 20 consisting of an amplifier A1, a resistor R1, a capacitor C1, and an amplifier A2, and the output is applied to an NAND circuit 15 and an NOR circuit 16. The input pulse P1 is directly applied to another input of the NAND circuit 15, and the output P3 is an inverted pulse with delayed size of the input pulse P1. The input pulse P1 is directly applied to another input of the NOR circuit 16, and the output P4 is an inverted pulse with delayed leading of the input pulse P1. When the output P3 of the NAND circuit 15 is applied to the P channel MOSFETQu and the output P4 of the NOR circuit 16 is applied to the N channel MOSFETQd, since there is no period to conduct the two at the same time, the through-current can be suppressed. |
