发明名称 PULSE WIDTH CONTROL CIRCUIT
摘要 <p>PURPOSE:To simplify a circuit composition and eliminate a dead time by a method wherein the core of a saturable reactor controlled by an impedance control circuit is given square hysteresis characteristics. CONSTITUTION:An inputted pulse signal is outputted through a series circuit composed of an impedance element 15 and a diode 16. When a saturable reactor 18 is saturated, an impedance becomes zero. Therefore, if an external impedance control circuit 21 is controlled, the pulse width of the pulse signal is controlled. As the core of the saturable reactor 18 has square hysteresis characteristics and a residual flux density is small, the saturation point is in a first quadrant. Therefore, it is not necessary to apply an opposite polarity voltage from the outside for resetting. Moreover, as a dead time in the case of being used as a series switching device is within the period of a signal transmission, the circuit can be utilized efficiently.</p>
申请公布号 JPH0360361(A) 申请公布日期 1991.03.15
申请号 JP19890194576 申请日期 1989.07.27
申请人 MELS CORP 发明人 KAWACHI TAMOTSU;NORIKOSHI ISAMI
分类号 H01F38/02;H02M1/08;H02M3/28;H03K5/00 主分类号 H01F38/02
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