发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To shorten a test time and to improve reliability by selecting a normal first test circuit and a second test circuit which compares the potential of a prescribed node in a memory main part with a previously set prescribed value and which judges the presence or absence of the abnormality of the node so as to control them. CONSTITUTION:The first test circuit 2 which conducts a normal test, the second test circuit 3 which compares the potential of the prescribed node in the memory main part 4 with the previously set prescribed value and which judges the presence or absence of the abnormality of the node, and a test mode judgement circuit 1 which selects the test circuits 2 and 3 by a signal from outside and which controls the operation and non-operation of the test circuits are provided. Since the test of a maximum cycle time can be conducted only by the test of one cycle, the test time can be shortened and one that is barely passed in the test of the maximum cycle time can be detected. Consequently, reliability can be improved.
申请公布号 JPH0359899(A) 申请公布日期 1991.03.14
申请号 JP19890195458 申请日期 1989.07.27
申请人 NEC CORP 发明人 SUGIBAYASHI NAOHIKO
分类号 G11C29/00;G11C11/401;G11C29/12;G11C29/34;G11C29/50 主分类号 G11C29/00
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