| 摘要 |
<p>PURPOSE:To improve processing speed by providing a bus switching circuit, dividing the circuit into plural blocks, arranging the blocks on a chip and connecting the respective blocks to respective close dividing buses. CONSTITUTION:In an LSI chip, a bus 3 is arranged in the shape of a cross, for example, and a bus switching circuit 4 is provided in an intersection point. The circuit is divided into blocks 2A-2D for each function of the LSI and the respective circuit blocks 2A-2D are arranged on the both sides of the bus 3 and respectively connected to the bus 3. The bus switching circuit 4 is controlled so that an intervals among the blocks 2A-2D to desire the transfer of data can be the shortest route. Then, connection between buses is executed. Thus, the apparent length of the bus 3 to be connected to the respective circuit blocks 2A-2D is shortened and load capacity is reduced. Then, time required for the polycharge / discharge of the bus 3 is shortened.</p> |
