Postage meter with a non-volatile memory security circuit

摘要

An electronic postage meter with a non-volatile memory security circuit apparatus is disclosed. The security circuit comprises means for limiting the amount of time the memories may be continuously enabled, means for preventing simultaneous enabling of both memories and means for preventing the write enabling of a memory if the write enable signal is active before a memory select signal is active. The circuit prevents memory access when a conflict is sensed across in an output related to the non-volatile memories. The security circuit provides additional protection to the non-volatile memory so that valuable critical accounting information located therein cannot be modified or destroyed.