| 摘要 |
<p>PURPOSE:To attain the frame alignment while warranting the time sequence by providing an individual phase memory, a common phase memory and a belonging memory and referencing the memories so as to select a write start phase. CONSTITUTION:Low speed frames are sent in the order of frames A-D while being subject to byte multiplex. Then an address to the frames A-D is given to an individual phase memory 7 and a belonging memory 9 according to a value of a frame counter 10. The memory 9 has an address of a common phase memory 8 referenced by each low speed frame and gives a value of the address designated in the memory to the address of the memory 8. Thus, the values of the memories 7, 8 for each low speed frame are recognized by a control section 6 and the content of the memories 7, 8 is updated according to a prescribed operation based on slip production information detected by a phase comparator 5. According to the operation above, the frame alignment is executed by the multiplex processing while warranting the time sequence with the operation as above.</p> |
