发明名称 GENERATION METHOD FOR IN-CIRCUIT TEST PROGRAM
摘要 PURPOSE:To prevent the allocation of test pins to electronic components which are not used in a test program and to reduce the change quantity of a test system by providing a test program generation processing part. CONSTITUTION:Test pins and parts terminals corresponding information generation processing Ji inputs line connection information F1 and packaging information F2 and generates test pins and parts terminals corresponding information in test pins/parts terminals corresponding information F3. The test program generation processing part J2 inputs information J1 and information F3 and generates the test program in the test program F4. An in-circuit test is conducted by the program F4. Thus, the allocation of the test pins is prevented for the electronic components which are not used in the test program by using mounted information F2, and the change quantity of the test system can be reduced even if the number of the mounted electronic components is large and the number of the terminals of the parts increases.
申请公布号 JPH0350635(A) 申请公布日期 1991.03.05
申请号 JP19890184755 申请日期 1989.07.19
申请人 NEC CORP 发明人 TSUNODA NORIHIKO
分类号 G06F11/22 主分类号 G06F11/22
代理机构 代理人
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