发明名称 |
DIGITAL ZERO-IF SELECTIVITY SECTION |
摘要 |
DIGITAL ZERO-IF SELECTIVITY SECTION A Digital Zero-IF Selectivity Section (DZISS) is disclosed. The DZISS of the present invention teaches a topology that facilitates realization in both transmitters and receivers. In the preferred low-speed embodiment, the digital filter are comprised of cascaded filter sections employing decimation co reduce the data rate. In the preferred high-speed embodiment, the digital filters are more sophisticated as at least the first filter section is decomposed to enable high-speed operation. Decimation is also employed on the high-speed embodiment to allow subsequent circuitry to operate at a lower data rate thus consuming less power. In an alternate embodiment, applicable to the low-speed and high-speed preferred embodiments, sections of the digital lowpass filters are time multiplexed effectuating a cost and space savings. |
申请公布号 |
CA1281080(C) |
申请公布日期 |
1991.03.05 |
申请号 |
CA19860500739 |
申请日期 |
1986.01.30 |
申请人 |
MOTOROLA, INC. |
发明人 |
JASPER, STEVEN C.;LONGLEY, LESTER A.;LAMBERT, KATHERINE H. |
分类号 |
H03D1/00;H03B27/00;H03B28/00;H03C3/40;H03D1/22;H03D7/16;H03H17/02;H04B1/04;H04B1/30 |
主分类号 |
H03D1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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