| 摘要 |
An analog to digital converter for high-speed, high-accuracy conversion includes a charge storage means for storing an input analog value to be converted, means for controlling discharge of the charge storage means, a comparator means for sensing discharge level of said charge storage means and transmitting a stop signal at a precise time, a tapped delay line means which is responsive to a start signal to generate a sequence of binary values, a first register means responsive to the stop signal for capturing the binary values corresponding to a delay time between the start and the stop signal, and an encoder means coupled to the register means for converting the binary values to a digital value representative of the input analog value. In a further embodiment, a counter means and a second register means are employed in parallel with the tapped delay line means and the first register means in connection with a frequency reference to provide digital conversion over a wide dynamic range, the first register means and the tapped delay line means capturing input binary values over at least one cycle of the frequency reference which is one count of the counter.
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