发明名称 Power transistor switch status monitoring circuit
摘要 The monitoring circuit detects the voltage across the power transistor (1) and the voltage across the supplied load (3). The detected voltages are fed to respective voltage comparators (7,8), the first comparator (7) activated by the power transistor input signal (UIN) when the transistor (1) is conductive and the second comparator (8) activated when the transistor (1) is blocked. The outputs from both comparators (7,8) are combined to obtain the status signal (Ustat). Pref. the activation of the 2 comparators (7,8) is pref. effected via AND gates (10,11) respectively controlled directly by the power transistor input signal (UIN) and via an inverter (9).
申请公布号 DE4026398(A1) 申请公布日期 1991.02.28
申请号 DE19904026398 申请日期 1990.08.21
申请人 WABCO WESTINGHOUSE FAHRZEUGBREMSEN GMBH, 3000 HANNOVER, DE 发明人 GROEGER, JENS, DIPL.-ING., 3000 HANNOVER, DE;GUDAT, WOLFGANG, DIPL.-ING., 3016 SEELZE, DE;HESSE, KARL-HEINZ, DIPL.-ING., 3007 GEHRDEN, DE;RUHNAU, GERHARD, 3057 NEUSTADT, DE
分类号 H01H47/00;H03K17/08;H03K17/18 主分类号 H01H47/00
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