发明名称 WORKING/STANDBY CLOCK PULSE SUPPLY FOR DIGITAL SYSTEMS
摘要 A working/standby clock pulse supply for digital systems, particularly for synchronous multiplex systems and switching systems, has a working clock oscillator and a standby oscillator. The working clock signal or the standby clock signal is guided by way of assemblies whereby at least one clock signal summing circuit is provided which adds equal harmonic spectral signals of various amplitudes of the working clock signal and the standby clock signal to provide a resulting spectral signal.
申请公布号 AU6135890(A) 申请公布日期 1991.02.28
申请号 AU19900061358 申请日期 1990.08.27
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 NAME NOT GIVEN
分类号 G06F1/04;H03B28/00;H03K5/19;H03K12/00 主分类号 G06F1/04
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