发明名称 VOLTAGE SETTING SYSTEM BY SIGNAL CONTROL
摘要 <p>PURPOSE:To set a power voltage setting signal from a control circuit having a fault to be invalid by recognizing whether the signal of a prescribed pattern is transmitted from the control circuit or not and inputting the subsequent power voltage setting signals to a power device by means of setting that the signal of the prescribed pattern is transmitted as a condition. CONSTITUTION:The control circuit 3 having a function conducting the test of the circuit, the power device 2 changing a power voltage in correspondence with the power voltage setting signal transmitted from the control circuit 3 and a signal recognition circuit 20 which recognizes whether the signal of the prescribed pattern is transmitted from the control circuit and which outputs the subsequent power voltage setting signal to the power device 2 with setting that the signal of the prescribed pattern is transmitted as the condition are provided. Prior to the test, the control circuit 3 outputs the signal of the prescribed pattern. Thus, the power voltage setting signal outputted from the control circuit where the fault occurs can be set invalid.</p>
申请公布号 JPH0346037(A) 申请公布日期 1991.02.27
申请号 JP19890182072 申请日期 1989.07.14
申请人 PFU LTD 发明人 MATSUDA KENJI
分类号 G06F1/26;G06F11/24 主分类号 G06F1/26
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