| 摘要 |
In a data processing system having an ALU and a memory, a decode/driver circuit has a dynamic node in which the voltage variation of the node is controlled. When the circuit is enabled, the dynamic node is precharged to a predetermined voltage potential which drives an output drive transistor. The output drive transistor couples a decoded select signal to an output terminal and inadvertently causes the dynamic node's voltage potential to change, thereby negatively affecting the voltage at the output terminal. To compensate, a transistor is provided which connects a predetermined voltage terminal to the dynamic node in response to the voltage at the output terminal.
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