发明名称 Integrated circuit for level shift
摘要 An integrated circuit for level shift is a parallel-connected circuit comprised of a first circuit including a first MOS FET of one conductive type, a third MOS FET of another conductive type and a first MOS FET of the other conductive type which are series-connected in this order and a second circuit including a second MOS FET of the one conductive type, a fourth MOS FET of the other conductive type and a second MOS FET of the other conductive type which are series-connected in this order, wherein gates of the first and second MOS FETs of the one conductive type are connected respectively to the output side and input side of an inverter connected to a low voltage electric power source, gates of the third and fourth MOS FETs of the other conductive type both are connected to a reference voltage source, a gate of the first MOS FET of the other conductive type is connected to a common junction point of the fourth MOS FET and the second MOS FET of the other conductive type, a gate of the second MOS FET of the other conductive type is connected to a common junction point of the third MOS FET and the first MOS FET of the other conductive type, and the parallel-connected circuit is connected to a high voltage electric power source.
申请公布号 US4996443(A) 申请公布日期 1991.02.26
申请号 US19890317813 申请日期 1989.03.01
申请人 CANON KABUSHIKI KAISHA 发明人 TATENO, TETSUYA
分类号 H03K5/02;H03K3/356;H03K19/0185 主分类号 H03K5/02
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