| 摘要 |
PURPOSE:To save power consumption of a drive circuit by dividing plural shift registers into plural groups and supplying a transfer clock to one group among the plural groups for each prescribed time interval. CONSTITUTION:Each output of shift registers F1-Fm switches a picture signal fed to a picture signal terminal 34. A register input timing data is inputted to a terminal 33. A gate circuit 36 stops a clock pulse given to a register 37 selectively. A transfer clock is inputted to a terminal 32 and given to a frequency divider 39 and the circuit 36. A decoder multiplexer 41 receives an output of a counter 40 and sends the inputted signal sequentially to close one of the circuits 36. Thus, one of the circuits 36 is selected and a clock is supplied to each block of a selected shift register 37. Thus, number of stages of the register 37 is selected to be (m) and divided into k-blocks by n-stages each to reduce the power consumption of the drive circuit. |
