发明名称 TEST SIGNAL GENERATION CIRCUIT
摘要 PURPOSE:To prevent malfunction by preventing the generation of a test signal when noise more than a test level voltage is impressed on the input terminal of a test signal generation circuit when it is normally used. CONSTITUTION:A test level detection circuit 8 generates a test level detection signal S11 when a voltage beyond the range of a power voltage level is impressed on the input terminal 5 from a ground level. A first control circuit 9 generates a test signal S10 when a reset signal S3 is generated when the test level detection signal S11 is generated, and it does not generate the test signal S10 when the reset signal S3 is not generated. A second control circuit 2 generates an internal reset signal S1 when the test signal S10 is not generated when the reset signal S3 is generated, and does not generate the internal reset signal S1 when the test signal S10 is generated.
申请公布号 JPH0342733(A) 申请公布日期 1991.02.22
申请号 JP19890179239 申请日期 1989.07.11
申请人 NEC CORP 发明人 MATSUZAWA MASAO
分类号 G06F11/22 主分类号 G06F11/22
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