| 摘要 |
PURPOSE:To easily revise a synchronizing pattern externally by providing a shift register to use as a signal parallel conversion means, a synchronizing pattern detection ROM to use as a synchronizing pattern detection means and a coincidence/dissidence detection circuit. CONSTITUTION:A frame data bit string 11 is read by a shift register 1 by using a clock 12, expanded in parallel to an output 13 and outputted to a synchronizing pattern detection ROM 2A. A data written in an address of the ROM 2A corresponding to the bit string expanded at the output 13 of the register 1 is outputted to a frame synchronizing detection pulse 15. When a coincidence detection circuit 4 fetches the pulse 15 for N times consecutively at the intervals of 4-bit, synchronizing lock notice 16 is applied to a dissidence detection circuit 5 and a frame pulse 18 is outputted. Then the circuit 5 compares the pulses 15, 18 to detect the coincidence/dissidence and in the case of dissidence, an out-of-synchronism alarm 19 is outputted. Thus, a synchronizing pattern is easily changed externally. |
