摘要 |
<p>A READ-WHILE-WRITE current-mode logic RAM cell suitable for use in a RAM device having the ability to simultaneously write and read data. The RAM cell contains a bit-cell consisting of flip-flop configured transistors (14 and 16) differentially connected to a constant current source (V3 and V4), a multiple-emitter transistor network (10) tied to each bit-cell load resistor which prevents the bit-cell from saturating, separate READ and WRITE data lines, and READ and WRITE buffer transistors having READ and WRITE control lines.</p> |