发明名称 READ-WHILE-WRITE RAM CELL
摘要 <p>A READ-WHILE-WRITE current-mode logic RAM cell suitable for use in a RAM device having the ability to simultaneously write and read data. The RAM cell contains a bit-cell consisting of flip-flop configured transistors (14 and 16) differentially connected to a constant current source (V3 and V4), a multiple-emitter transistor network (10) tied to each bit-cell load resistor which prevents the bit-cell from saturating, separate READ and WRITE data lines, and READ and WRITE buffer transistors having READ and WRITE control lines.</p>
申请公布号 WO1991002358(A1) 申请公布日期 1991.02.21
申请号 US1990001008 申请日期 1990.02.26
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