| 摘要 |
<p>An analog-to-digital converter circuit is disclosed for receiving an analog input signal and producing a digital output having a plurality of binary bits representative of the input signal. A number of devices (131-138) are utilized, each of which has a voltage versus current characteristic with a plurality of peaks, and negative resistance regions between said peaks. For each bit to be produced, a pair of said devices (131-138) are provided, each being coupled in series arrangement with a resistor (RL1-RL8). Signals from both of the series arrangements are combined for each respective bit to be produced. The combined outputs (D3-D0) respectively represent the produced binary bits. In the preferred embodiment, the means for applying predetermined portions of the input signal comprises means for applying different fractional portions of the input signal to respective pairs of series arrangements. In this embodiment, the input signal comprises an input voltage (Vin), and a voltage offset (Vq/2) is applied to the input signal.</p> |
