| 摘要 |
<p>A single ended sense amplifier (20) senses whether or not a memory cell (24) in an array conducts current from a bit line conductor (22) to which the sense amplifier is connected. A first stage of the sense amplifier (20) includes a number of separately biased transistors (32, 34, 36, 38) which establish a lower voltage level at a node (46) when the cell conducts current than the higher voltage level at the node when the cell does not conduct current. A second stage of the sense amplifier includes transistors (48, 50, 52) connected in an inverting arrangement to receive the signal from the node (46) and supply an output signal at an output terminal (56) in response thereto. An equalizing transistor (50) is selectively connected between the node (46) and the output terminal (56) when conductive and establishes at the node a high gain bias point voltage intermediate the higher and lower voltages established at the node (46) by the first stage.</p> |
