| 摘要 |
PURPOSE:To form the disk cache system provided with both a high speed property of an SRAM and a large capacity property of a DRAM by using simultaneously the DRAM and the SRAM. CONSTITUTION:A storage device controller 1 is provided with a DRAM control part 5 and an SRAM control part 6, and both the RAM control parts 5, 6 execute an access to a DRAM 3 and an SRAM 4, respectively in accordance with an instruction of other control part 10. A memory address of each RAM 3, 4 in such a case is supplied from a memory address control part 8. Also, a data control part 9 converts mutually parallel data of a RAM and serial data of an auxiliary storage device, or switches and connects a data bus of the RAM to the auxiliary storage device side or a microprocessor 2 side. This storage device controller 1 is provided between a host computer and the auxiliary storage device. In such a way, a disk cache system provided with both a large capacity property of the DRAM 3 and a high speed property of the SRAM 4 can be constructed. |
