发明名称 PACKET COMMUNICATION EQUIPMENT
摘要 <p>PURPOSE:To select a packet with priority by counting a resident time integration value of each packet belonging to each priority class respectively at a period by priority class classifications and comparing and calculating the resident time integration values. CONSTITUTION:The clock signal of a different frequency is fed from a clock generating section 29 at every column of each buffer basic unit of each buffer basic unit 1st column - n-th column, that is, by priority class classifications. A transmission control section 28 selects a maximum resident time integration value among resident time integration values D'1-D'2 in a counter 41 in buffer basic units 27-1, 27-2 - 27-n at the tail end. Then the packet of the selected resident time integration value is sent with priority. Thus, high speed processing is attained.</p>
申请公布号 JPH0338139(A) 申请公布日期 1991.02.19
申请号 JP19890172520 申请日期 1989.07.04
申请人 TOSHIBA CORP 发明人 KUDO NORIMASA
分类号 H04Q11/04;H04L12/801;H04L12/911 主分类号 H04Q11/04
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