| 摘要 |
<p>PURPOSE:To provide the active matrix substrate having scanning lines or wirings for additive capacitors with which the generation of a resistance increase, disconnection and peeling is less by constituting the scanning lines of discontinuously formed lower scanning lines and continuous upper scanning lines covering lower scanning lines. CONSTITUTION:A gate bus wiring 23 consists of two layers; a lower gate wiring 2 and an upper gate wiring 3. A wiring 31 for the additive capacitors similarly consists of two layers; a wiring 29 for lower capacitors and a wiring 30 for upper capacitors. An Mo metal, Al metal, etc., of low resistance are used for the lower gate wiring 2 and the wiring 29 for the lower capacitors in order to lower the specific resistance of the gate wiring 23 and the wiring 31 for additive capacitors. A Ta metal which can form an anodically oxidized film is used for the upper gate wiring 3 and the wiring 30 for the upper capacitors. The upper gate wiring 3 is formed to completely cover the lower gate wiring 2 in order to protect the wiring 2. The wiring 30 for the upper capacitors is formed to completely cover the wiring 29 for the lower capacitors.</p> |
