| 摘要 |
PURPOSE:To accurately extract a graphic included in other outlines and to easily attain analog substrate wiring design by excluding a simple graphic even a part of which is utilized for outline extraction from candidates to be extracted by the preceding outline extracting cycle. CONSTITUTION:The graphic data of combined graphics of which outlines are to be extracted are sent from a file 3 to a processing part 1, whether each simple graphic even a part of which is used for outline extraction and processed or not is indicated and an identifier indicating a cycle number corresponding to a processed simple graphic is added to the graphic and stored in a main memory 2. The processing part 1 selects a starting graphic for the outline extraction out of simple graphics indicated as processed ones by the identifiers in each outline extracting cycle, determines its starting point and updates the cycle number. Then, the simple graphics processed up to the extracting cycle immediately before the current one are excluded from candidates to be extracted to extract the determined outline. The identifier added to the simple graphic even a part of which is used for outline extraction is updated to the current cycle number. |
