发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To store a plurality of bits of information in one memory cell by changing the ratio of a depletion and an enhancement regions occupied in a gate, and further setting the impurity concentration in the depletion region for a plurality of values. CONSTITUTION:Two bits of information can be stored in each of memory cells MC1-MC4. To store two bits of information, four cases, wherein firstly the whole gate region is enhancement type, secondly about the half of the gate region is enhancement type and the remaining part is depletion type, thirdly the whole gate region is depletion type, fourthly the whole gate region is depletion type and the impurity concentration thereof is larger than that of the third case, are considered. As to above four cases, when, e.g. the first case is applied to the memory cell MC1, the second to the MC2 the third to the MC3, the fourth to the MC4, if firstly the memory cell MC1 is selected in reading out, a word line W1 will be at low potential, usually earth potential, and the other word lines W2-W4 will be at high potential, usually power supply potential or potential lower than the power potential by the threshold value of a MOS transistor.
申请公布号 JPH0336764(A) 申请公布日期 1991.02.18
申请号 JP19890172398 申请日期 1989.07.04
申请人 MATSUSHITA ELECTRON CORP 发明人 NISHIMOTO TOSHIO
分类号 H01L27/112;H01L21/8246 主分类号 H01L27/112
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