| 摘要 |
PURPOSE:To reduce the generation probability of the malfunction of the input or disconnection of a power source to a low order device even when the malfunction of a microprocessor is generated by executing the input or disconnection of the power source only when an interval between the sending timing of a first instruction and the sending timing of a second instruction is within a prescribed time. CONSTITUTION:When the timing to generate a clock signal to a flip-flop (F/F) 8 is larger than a time T, both of the J input and K input of the F/F 8 are made into a logic value '0', and the output of the F/F 8 holds the condition before the clock signal is inputted. Namely, only when the interval between the timing to issue the instruction for triggering a one-shot F/F 6 or 7 by means of a microprocessor 1 and the timing to issue the instruction for generating the clock signal to the F/F 8 is within the time T, the F/F 8 is set, and a relay is made into a closed condition or opened condition. Thus, the probability that the relay is made into the closed condition or opened condition by mistake due to the malfunction of the microprocessor 1 can be reduced. |
