DUAL DOMAIN MEMORY CONTROLLER

摘要

An asynchronous memory control unit (14) for asynchronously controlling access to and from system memory (16) of a microcomputer system in response to control signals from conventional and state-of-the-art microcomputer I/O buses is described. The asynchronous memory control unit (14) of the present invention operates cooperatively with a synchronous memory control unit (12) which provides access to and from system memory (16) in response to command signals from a microprocessor. Whenever the microprocessor controls the bus, the synchronous memory control unit (12) is enabled; whenever the microprocessor is not controlled of the bus at main I/O bus, the asynchronous control unit (14) is enabled.