发明名称
摘要 PURPOSE:To increase the layout freedom of a memory cell and to reduce its occuplied area by using only one node output of an FF of a non-volatile memory cell by utilizing the fact that signal inversion forms the other information. CONSTITUTION:A non-volatile RAM is formed by a non-volatile memory cell 1 and a non-volatile memory cell 3 and the output of one node N1 of the FF forming the cell 1 is supplied to the cell 3. The 3rd TRT11 of the cell 3 is turned on when the output of the node N1 is at high level and the stored information is ''1'', and when the stored information is ''0'' and the output is inverted, turned off. Information is transferred from the cell 1 to the 3rd capacitor TC11 of a floating gate circuit element through the 4th TRT12, the 1st and 2nd capacitors C12, C13 and the 5th TRT15, a capacitor C15, etc. of the cell 3. The transfer of the information in the cell 3 to the cell 1 is executed similarly, so that the layout freedom of the memory cells is increased and the occupied area is reduced by using only one output of the node of the FF.
申请公布号 JPH039559(B2) 申请公布日期 1991.02.08
申请号 JP19840038829 申请日期 1984.03.02
申请人 FUJITSU LTD 发明人 ARAKAWA HIDEKI
分类号 G11C14/00 主分类号 G11C14/00
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