Opto-electronic test system for PCB - has circuit detecting bores in conductor path pattern ascertained by image converter

摘要

The test system detects faults in conductor path patterns of p.c.b.'' with through-bore soldering eyes. An image converter detects the conductor path pattern to be tested. A circuit generates a serial binary image signal (bsV) from the output signal of the image converter. A fault recognition circuit (Fe) is initiated by the binary image signal. The circuit measures the sizes of the structures ascertained by the converter and registers a fault if a preset min. value is not attained. A circuit (SEB), with two memories (Sp1,Sp2) and correlator (Ko), detects bores in the conductor path pattern. A fault suppression circuit (Fus) suppresses registering (Fm) of faults that are based on measurements of the structures in radial directions directly close to a known bore. ADVANTAGE - Reliable but min. geometry measuring. Only suppresses reports of faults near bores, e.g. arising from bore edge that is too thin, but not reports of faults arising from other causes.