发明名称 FRAME SYNCHRONIZATION CIRCUIT
摘要 <p>PURPOSE:To reduce the time from the asynchronizing state till the synchronization restoration by avoiding a word synchronization from executing resynchronization every execution of resynchronization by a frame synchronizing circuit. CONSTITUTION:When the circuit executes the resynchronization from an asynchronous state, the word synchronization by a ring counter 15 is executed independently of the frame synchronization by a frame counter 23 in the timing when logical 1 appears at the output of an exclusive NOR circuit 19. The frame synchronization by the frame counter 23 is executed when dissidence appears at the detection output of a frame coincidence detection circuit 21 and the resynchronization of the frame synchronization is executed by revising the phase of the frame counter 23 independently. That is, even when the dissidence of the frame pattern is detected by the frame synchronization circuit, the phase of the frame counter 23 is changed without giving effect onto the word synchronization. Thus, the time till the synchronization establishment is reduced as a whole.</p>
申请公布号 JPH0329436(A) 申请公布日期 1991.02.07
申请号 JP19890162978 申请日期 1989.06.26
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 TATSUNO HIDEO;TOKURA NOBUYUKI
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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