发明名称 Controlling digital circuit, esp. of computer architecture - forming timing plane with component connected to opto-electronic bus data plane also connected to timing plane
摘要 A method of controlling digital circuits with optoelectronic buses forming data planes involves generating an optoelectronic timing pulse and timing generator plane. The components optically coupled to the data plane are also coupled to the timing plane. The circuit components intercommunicate and exchange information to form operational processes. Information from all connected components appears at each component in successive words. Depending on program status the correps. number of components conduct their operations in common. USE/ADVANTAGE - E.g. for control and regulation systems. Avoids slowing down of system as number of components increases.
申请公布号 DE3924659(A1) 申请公布日期 1991.02.07
申请号 DE19893924659 申请日期 1989.07.26
申请人 GUTJAHR, LOTHAR, 7831 MALTERDINGEN, DE 发明人 GUTJAHR, LOTHAR, 7831 MALTERDINGEN, DE
分类号 G02B6/43;G06E1/00;H05K1/02;H05K1/14 主分类号 G02B6/43
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