发明名称 PROCESS FOR FABRICATING SEMICONDUCTOR DEVICES
摘要 <p>A process for fabricating semiconductor devices such as MOS integrated circuits, in which a plurality of diffusion layers formed by doping a substrate with impurities at high concentration are connected together using a high-melting metal silicide. A silicon layer (108) under a non-doped layer is formed on the substrate (100) to be processed, and a high-melting metal layer (109) is formed on the silicon layer (108). The high-melting metal layer (109) is reacted with the silicon layer (108) to form the high-melting metal silicide (112) that connect the diffusion layers together. Thus, the high-melting metal silicide layer (112) can be stably formed suppressing the junction leakage as low as possible.</p>
申请公布号 WO1991001568(P1) 申请公布日期 1991.02.07
申请号 JP1990000821 申请日期 1990.06.25
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