| 摘要 |
<p>PURPOSE:To perform a time sharing control at high speed and with high resolving power by a method wherein a drive signal having a predetermined pulse width is formed, and a large number of heads are subjected to a time sharing control on this drive signal. CONSTITUTION:In a head element position address setting means 13, an address of a memory 12 is determined to assign one line, for example, one of 3000-5000 head pins. The content n-address apart from the assigned pin is set in the memory 12 by an n-delay address setting means 15 and read to be latched in a latch circuit 16. The content of the latch circuit 16 is recorded in the memory 12 through an inverter 17 and an AND circuit 11. Thereafter, the content m- address apart from the assigned pin is set in the memory 12 by an m-delay address setting means 14 and read to be latched in a latch circuit 18. The content latched in the latch circuit 18 is supplied to an AND circuit 20 together with a signal to succeedingly pass through the AND circuit 11, i.e., a signal with one clock delay, and fetched by an output terminal 21 as a required output signal. On this output signal, thermal heads are subjected to a time sharing control by the amount of A pieces.</p> |
