发明名称 HIGH VOLTAGE GENERATING CIRCUIT
摘要 <p>PURPOSE:To permit the characteristic test of a cell without providing any high voltage input terminal externally by utilizing the level drop of N-channel transistor to produce a high voltage having different level. CONSTITUTION:An internal high voltage VPM is supplied from a boosting circuit 9 through a selecting N-channel transistor 7 and a route L1 for writing into and erasing out of an EEPROM cell. In order to test the characteristics of the EEPROM cell, the internal high voltage VPM, lower than a threshold value voltage by N steps, is supplied from the boosting circuit 9 through the selecting N-channel transistors 10, 11,...N while the voltage is set by the number of step. Accordingly, the internal high voltage VPM for testing the characteristics of the EEPROM cell can be supplied by employing the N-channel transistors 11,...N without providing any special high-voltage input terminal externally. According to this method, it is not necessary to provide any special high-voltage input terminal externally while any means, inputting a high voltage from outside upon measuring, may not be necessitated.</p>
申请公布号 JPH0322860(A) 申请公布日期 1991.01.31
申请号 JP19890157708 申请日期 1989.06.19
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 NOZOE TOSHIAKI
分类号 G11C17/00;G11C16/06;H01L21/822;H01L27/04;H02M3/07 主分类号 G11C17/00
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