| 摘要 |
<p>PURPOSE:To decrease a circuit scale and to attain high speed and high coding efficiency by inputting n-set of digital data having m-set of quantization level as one block and applying one-to-one variable code conversion with one coding table prepared in advance. CONSTITUTION:A quantization output signal of a predict error signal in a high efficient coding of a picture signal is inputted to a variable length coding circuit 21 as data strings D1-Dn. Based on the coding table in the variable length coding circuit 21, for example, the conversion as show in the table is applied. Then code length information VWL and code information VWLD are outputted to a multiplex circuit 22. Data BMD sent to the receiver side is inputted to a buffer memory 31 and stored and held and read out as a readout data RD-R by an asynchronous readout clock RCK-R. Thus, since the parallel time serial data is subjected to variable length coding at once, the variable length coding circuit is easily miniaturized.</p> |
