发明名称 CELL SWITCHING SYSTEM
摘要 <p>PURPOSE:To reduce the dissipation of a cell and to compress hardware by providing a counter at every line, an address conversion circuit in common for every line, and a null address FiFo, and writing an input cell on a null address by using a buffer memory correspondins to each output line in common. CONSTITUTION:Write counters 103, 104 and readout counters 105, 106 are provided corresponding to each of output circuits 217, 218, and their values are converted to the addresses of a common buffer memory 109 with a common address conversion memory 107 in common for the output circuits 217, 218. Therefore, the quantity of the hardware can be reduced, and the buffer memory 109 can be effectively used. Then, the readout of the buffer memory 100 is performed, and an address not being used is stored in the null address FiFo 108 of a pre-write/pre-read memory, and its output information is inputted by converting to the null address of the common buffer memory 109 with the address conversion memory 107. In such a manner, the hardware can be compressed, and the probability of dissipation of the cell in a switch can be lowered.</p>
申请公布号 JPH0323740(A) 申请公布日期 1991.01.31
申请号 JP19890156802 申请日期 1989.06.21
申请人 RINKU:KK;HITACHI LTD 发明人 OGINO MINEO;OZAKI NAOHIKO;SAKURAI YOSHITO
分类号 H04Q11/04;H04L12/28;H04Q3/00 主分类号 H04Q11/04
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