Data communications system with two=part address and data buses - enables direct I=O transfer during instruction fetching to eliminate microprocessor delays

摘要

The data communications system contains a Neumann type microprocessor connected to the first parts of two-part address and data buses and to a control bus. A similarly connected program memory stores microprocessor instructions. Data is stored by a memory connected to the second address and data bus parts, which are connected to I/O devices, and to the control bus. The address and data buses are divided during instruction fetching, otherwise they are united. Direct I/O transfer occurs via the second data bus part during instruction fetching. USE/ADVANTAGE - Direct I/O transfer is effected without microprocessor delays.