发明名称 Comparator circuit
摘要 A novel comparator circuit is disclosed, in which a pulse output is obtained from the output terminal of a differential amplifier through a transistor by applying a threshold voltage to either input terminal of a differential amplifier composed of a pair of transistors and then comparing an input voltage applied to the other input terminal therewith, wherein the aforementioned pair of transistors of the differential amplifier are each composed of two transistors connected in a complex manner, the input voltage is directly inputted, without the use of a buffer or the like, by raising the input impedance of the comparator circuit to thereby simplify the circuit as a whole and to widen its scope of application. Further, the output terminal of the differential amplifier connected to a transistor in an output circuit of the comparator circuit and a power source are connected through a resistor so as to ensure against occurrence of impulses in the output pulses through prevention of operation of the output circuit alone before changing of the threshold voltage for causing a hysteresis property to be imparted to the comparator circuit.
申请公布号 US4988895(A) 申请公布日期 1991.01.29
申请号 US19900541211 申请日期 1990.06.22
申请人 SHARP KABUSHIKI KAISHA 发明人 KIHARA, SEIICHIRO;TANI, ZENPEI;NAGAO, HISAO
分类号 H03K5/08;H03K3/0233;H03K17/30;(IPC1-7):H03K5/153;H03K5/24 主分类号 H03K5/08
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