发明名称 INTEGRATED SEMICONDUCTOR MEMORY AND OPERATING METHOD THEREOF
摘要 PURPOSE: To determine an operating range and an individual error source of an evaluation circuit during a test operation by providing a semiconductor memory with a means for connecting an external bit line to a potential the value of which is freely selectable. CONSTITUTION: A semiconductor memory is provided with a means TN, TP for connecting an external bit line XB, -XB to a potential VXN, VXP the value of which is freely selectable. In a memory cell MC during the test operation of a DRAM type semiconductor memory, such data that possess a value of the potential different from the one corresponding during the normal operation are stored in this case, other part of the semiconductor memory is operated, during the test operation, by the same signal and the value of the potential as in the normal operation. Consequently, it is possible to determine the operating range and the individual error source of the evaluation circuit AMPL during the test operation.
申请公布号 JPH0319195(A) 申请公布日期 1991.01.28
申请号 JP19900141200 申请日期 1990.05.29
申请人 SIEMENS AG 发明人 DEIITAA KANTSU
分类号 G11C11/409;G11C11/401;G11C11/4096;G11C29/50 主分类号 G11C11/409
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