| 摘要 |
PURPOSE:To remarkably shorten the sense time by placing a sub-sense amplifier driving circuit in a space generated between two sense amplifier circuit areas. CONSTITUTION:This device is provided with a memory area 5 in which a memory cell area formed from plural memory cells 1 and a sense amplifier circuit area 4 formed from a sense amplifier circuit 3 connected through a bit line to the respective memory cells of this memory cell area 2 are arranged in the line direction, a word line 6 connected in common at every line address of the memory cell area 2, and sense amplifier driving circuit parts 8, 9 placed in a clearance in the row direction of the peripheral part and the inside of the memory area. In this case, by providing a discharge current path from the bit line in many directions, a wiring resistance of a discharge line can be reduced equivalently. Accordingly, the clamp potential can be lowered, and simultaneously, a discharge time constant can be made small. In such a way, the sense time of a column bar pattern can be shortened. |
