| 摘要 |
The invention relates to a voltage multiplying circuit having several stages, with each stage having a pumping capacitor and several MOS switching transistors. The switching transistors are so controlled by clock signals that the charge of a pumping capacitor of one stage is transferred to the pumping capacitor of the following stage. Operation of a circuit of this type with operating voltages substantially lower than 5 V entails considerable drawbacks. In accordance with the invention, therefore, each stage of a voltage multiplying circuit of this type is fitted with an additional transistor and an additional correction capacitor. As a result, the circuit in accordance with the invention is suppliable with an operating voltage of 2 V, for example. In another circuit arrangement, the transistors of the last two or three stages of the voltage multiplying circuit are of one conductivity type, while the transistors of the previous stages are of the opposite conductivity type. The last stages do not need a correction capacitor. |
