| 摘要 |
PURPOSE:To decrease fluctuation of an output voltage and temperature fluctuation by utilizing a complementary output voltage of an emitter coupled logic gate in a pulse width analog voltage circuit. CONSTITUTION:A voltage at a midpoint of two complementary output voltages whose mark rate is changed from the emitter coupled logic ECL gate 20 is extracted from an LPF comprising resistors 21, 22 and a capacitor 29. The voltage at the midpoint is applied to an inverting input of a differential amplifier 3 via resistors 23, 24. On the other hand, any output voltage of the ECL gate 20, e.g., an output voltage at a terminal Q is fed to the LPF comprising a resistor 26 and a capacitor 28, from which a DC voltage corresponding to the mark rate is obtained and the voltage is inputted to a non-inverting input of the amplifier 3. Then the output voltage corresponding to the difference between the two DC voltages inputted in this way is extracted at an output terminal 6. Thus, the fluctuation of the output voltage and the temperature fluctuation are reduced in this way. |
